(International Journal Papers)
J.8 Yoon Seok Yang, Ehsan Rohani, Jingwei Xu, and Gwan Choi, "Low-Power Cross-layer Error Management using MIMO-LDPC Iterative Decoding for H.264 Processing", ACM Transactions on Embedded Computing Systems, 2012 (under review).
J.7 Yoon Seok Yang, Hrishikesh Deshpande, Gwan Choi, and Paul Gratz "SDPR: Improving Latency and Bandwidth in On-Chip Interconnect through Simultaneous Dual-Path Routing", IEEE Transactions on Computers, 2012 (under review).
J.6 Yoon Seok Yang and Gwan Choi, "Unequal Error Protection based on DVFS for JSCD in Low-Power Mobile Multimedia Systems", ACM Transactions on Embedded Computing Systems, Vol. 11, No. 30, July 2012.
J.5 Yoon Seok Yang and Gwan Choi, "Design Space Exploration: Optimal Decoding Configurations for Low-Power Embedded LDPC-H.264 Joint Decoding Architecture", International Journal of Information Technology, Communications and Convergence (IJITCC), 2012.
J.4 Seung Eun Lee, Yoon Seok Yang, Gwan Choi, Wei Wu, Ravi Iyer, "Low-Power, Resilient Interconnection with Orthogonal Latin Squares," IEEE Design and Test of Computers, pp. 30-39, March/April 2011.
J.3 Yoonseok Yang, Jun-Ho Bahn, Seung Eun LEE, Jungsook Yang and Nader Bagherzadeh, "Parallel Processing for Block Ciphers on a Fault Tolerant Networkd Processor Array", International Journal of High Performance Systems Architecture (2010).
J.2 Jun Ho Bahn, Seung Eun LEE, Yoon Seok Yang, Jungsook Yang, and Nader Bagherzadeh, "On Design and Application Mapping of A Network-on-Chip (NoC) Architecture", Parallel Processing Letters (PPL), Vol. 18, Issue 2, pp. 239 - 255, June 2008.
J.1 Seung Eun LEE, Jun Ho Bahn, Yoon Seok Yang, and Nader Bagherzadeh, " A Generic Network Interface Architecture for a Networked Processor Array (NePA)", Lecture Notes in Computer Science (LNCS), Vol. 4934, pp. 247-260, Feb. 2008.
(International Conference Papers)
C.9 Ehsan Rohani, Jingwei Xu, Yoon Seok Yang, and Gwan Choi, "ASIC Implementation of Power-Aware Iterative MIMO Detection" (ASP-DAC 2012, under review).
C.8 Yoon Seok Yang, Reeshav Kumar, Gwan Choi, and Paul Gratz, "WaveSync: A Low-Latency Source Synchronous Bypass Network-On-Chip Architecture", the 30th IEEE International Conference on Computer Design 2012 (ICCD 2012).
C.7 Yoon Seok Yang, Hrishikesh Deshpande, Gwan Choi, and Paul Gratz, "Exploiting Path Diversity for Low-Latency and
High-Bandwidth with the Dual-path NoC Router", the IEEE International Symposium on Circuits and Systems 2012 (ISCAS 2012).
C.6 Yoon Seok Yang, Pankaj Bhagawat and Gwan Choi, "Energy-Efficient MIMO Detection Using Unequal Error Protection for Embedded Joint Decoding System", the 48th IEEE/ACM Design Automation Conference 2011 (DAC 2011).
C.5 Reeshav Kumar, Yoon Seok Yang, and Gwan Choi, "Intra-Flit Skew Reduction for Asynchronous Bypass Channel in NoCs", the 24th International Conference on VLSI Design 2011 (VLSID 2011).
C.4 Yoon Seok Yang and Gwan Choi, "Baseband Processing for Wireless Multimedia Systems using
Unequal Error Protection", Wireless Telecommunications Symposium, Tampa, Florida, USA, Apr. 2010 (WTS 2010).
C.3 Yoon Seok Yang and Gwan Choi, "Low-Power Embedded LDPC-H.264 Joint Decoding Architecture Based on Unequal Error Protection", In Proceedings of the 5th International Conference on Future Information Technology (FutureTech 2010), Busan, Korea, May 2010.
C.2 Yoon Seok Yang, Jun Ho Bahn, Seung Eun LEE, and Nader Bagherzadeh, "Parallel and Pipeline Processing for Block Cipher Algorithms on a Network-on-Chip, " Int'l Conference on Informantion Technology: New Generations (ITNG 2009), Apr. 2009.
C.1 Seung Hyun Lee, Seo Young San, Yoon Seok Yang, "Multi-format DTV system decoder supporting trick-play for PVR", SOC Design Conference 2003, COEX Asem Hall, Seoul Korea, Nov, 2003.
(Korean Journal Papers)
KJ.1 Yoon Seok Yang, Dong Ho Lee, "A Block-based Motion Detection Algorithm with Adaptive Thresholds for Digital Video Surveillance Systems", Journal of The Institute of Electronics Engineers of Korea, Vol37-SP, No5, pp 31-41, 2000.
(Patents)
United States Patent Application 20080137866 APPARATUS FOR ENCRYPTING/DECRYPTING REAL-TIME INPUT STREAM
공개특허 10-2006-0113091 (2006년11월02일) 디지털 수신기의 제한 수신 방법
등록특허 10-0686051 (2007년02월15일) 디지털 멀티미디어 방송에 있어서 ＡＶ 복호 방법
공개특허 10-2006-0102038 (2006년09월27일) 디지털 멀티미디어 방송 수신장치에서 ＰＶＲ 기능을 위한ＳＴＣ 제어 장치 및 방법
공개특허 10-2005-0077142 (2005년08월01일) ＭＰＥＧ4 싱크 레이어 패킷의 멀티 ＡＵ 전송 패킷화 방법
공개특허 10-2005-0073214 (2005년07월13일) ＰＶＲ 및 ＰＶＲ 기능을 갖는 ＤＭＢ 수신기
등록특허 10-0587324 (2006년06월08일) 디지털 멀티미디어 방송 서비스 방법, 송/수신기, 및 데이터 구조
등록특허 10-0565594 (2006년03월29일) 멀티 트랜스포트의 시스템 파서 제어장치
등록특허 10-0510692 (2005년08월31일) 제한 수신 시스템
공개특허 특2003-0062914 (2003년07월28일) 다단계 암호화/복호화 시스템
등록특허 10-0525389 (2005년10월25일) 실시간 입력 스트림의 암호화／복호화 장치
등록특허 10-0363732 (2002년11월23일) 영상 신호의 움직임 검출 장치 및 방법
aaaaa
aaaaa